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From: äÍÉÔÒÉÊ ÷ØÀËÏ× (dvyukov_at_[hidden])
Date: 2007-04-18 04:52:08


> > On x86 this is certainly not an issue, but on machines with more
> > relaxed memory model (ia64, sparc or power), in my opinion, this can
> > be an issue...
> If you take a look at the IA64 and PPC versions of sp_counted_base,
you'll
> see that they do include memory barriers.

In file boost_1_33_1/boost/detail/sp_counted_base_gcc_ia64.hpp :

class sp_counted_base
{
private:
//...
    long use_count_; // #shared
    long weak_count_; // #weak + (#shared != 0)
public:
    sp_counted_base(): use_count_( 1 ), weak_count_( 1 ) // <---------
ordinal store

In file boost_1_33_1/boost/detail/sp_counted_base_gcc_ppc.hpp the same....

In file boost_1_33_1/boost/detail/atomic_count_gcc.hpp :

class atomic_count
{
public:
    explicit atomic_count(long v) : value_(v) {} // <--------- ordinal store
///...
private:
//...
    mutable _Atomic_word value_;
};

gcc can compile to Alpha and to IA-64 and to PPC...

What I miss?


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