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From: Greg Colvin (gcolvin_at_[hidden])
Date: 1999-08-01 22:43:38


> > I did my testing on a P6 system. How badly is this chip hurt
> > by indirection?
>
> Not much. P6 systems only lose 30 cycles to 100 cycles on a pointer
> chasing miss.
>
> In future systems this cost will be much higher.
>
> I.e. I do not believe that you can test this experimentally right now.
>
> The only possible way would be to run your code on a simulator - such as
> the one I am writing.

Not a bad idea. Let me know when you have one we can use.

In the mean time, I'm left with guessing about the typical uses of smart
pointers, and the typical ratios of chasing pointers, vs. copying them vs.
actually doing something with what they point to. For any given design I
could easily write test cases that will make it appear to be the best, but
I don't really know what a representive test case is. So I tend to lean
towards the more flexible and elegant design, and use performance measures
just to be sure I'm not completely off the mark.

> All I can do is tell you what the trends are.

Thanks. The trends seem to be mostly against the kind of software I write,
which tends to be heavy on pointer chasing and byte array manipulation and
branching.

> (This is the typical problem: software gets optimized for 5 year old hardware
> (the P6 - Pentium III is actually a 10 year old design from my point of view),
> while hardware gets optimized for 5 year old software. Although in this case
> it doesn't matter: I don't know of anay unexplored track wrt speeding up
> pointers. It's just the trend as long as we use CMOS.)


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