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From: Phil Endecott (spam_from_boost_dev_at_[hidden])
Date: 2007-09-01 13:33:11


Dear All,

I note that shared_ptr uses architecture-specific assembler for the
atomic operations needed for thread safe operations, on x86, ia64 and
ppc; it falls back to pthreads for other architectures. Has anyone
quantified the performance benefit of the assembler?

Assuming that the benefit is significant, I'd like to implement it for
ARM. Has anyone else looked at this?

ARM has a swap instruction. I have a (very vague) recollection that
perhaps some of the newer chips have some other locked instructions
e.g. test-and-set, but I would want to code to the lowest common
denominator i.e. swap only. Is this sufficient for what shared_ptr wants?

I note that since 4.1, gcc has provided built-in functions for atomic
operations. But it says that "Not all operations are supported by all
target processors", and the list doesn't include swap; so maybe this
isn't so useful after all. Another thought is that gcc now ships with
a tr1/shared_ptr which is based on shared_ptr from boost 1.32; maybe it
uses the gcc built-in atomics... checks... no, it calls something
called __exchange_and_add, the implementation of which in libstdc++
(disassembled) doesn't look atomic to me!

Anyway: Is this worthwhile? Has it already been done? Is swap sufficient?

Regards,

Phil.


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