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From: Sebastian Redl (sebastian.redl_at_[hidden])
Date: 2008-01-19 11:54:59

Jeffrey Yasskin wrote:
> On Jan 18, 2008 12:43 PM, Cory Nelson <phrosty_at_[hidden]> wrote:
>> Athlon 64s (pre-dual core) do not have cmpxchg16b - how do you plan to
>> get around that?
> The same way atomic<struct {int* a, int* b}> gets around it in N2427:
> return false from .is_lock_free() and use a spin lock. That's why I
> was looking for someone else's implementation of atomic<T>; I'd rather
> not implement that switching myself if I can avoid it. :)
> Tim's solution is tempting, but I think incorrect, because the two
> words are actually used for two whole pointers
> (object+refcount_object). Hazard pointers for the refcount object
> prevent the ABA problem and ensure that it stays alive long enough for
> me to increment its refcount, although there may be other ways to
> ensure that too. I'm not certain this actually works; I just wanted to
> check that nobody else had already finished before starting on the
> implementation.
Remember also that merging pointer and refcount in the same variable
falls afoul of the pointer masking rules in N2481. Of course, if an
implementation announces that it supports garbage collection (which the
masking rules are about), the implementation could switch to a far
easier method anyway.

Sebastian Redl

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