Re: [boost] [lockfree] Review

Subject: Re: [boost] [lockfree] Review
From: Grund, Holger (Holger.Grund_at_[hidden])
Date: 2011-08-03 06:30:14

> > I'm not really sure how you would implement a fully correct lock-free
> > atomic<int128_t> on x64. A cmpxchg16b requires the underlying page to
> be
> > writable.
> 
> if the page is not writable, then why would you need an
> atomic<int128_t> in
> the first place?
> 
> - if the data is unchanging, then is doesn't matter
Well as I understand the current wording requires this to work:
const atomic<int128_t> x;
void foo() { int128_t y = x; }

Surely, you wouldn't want to revert to a lock implementation just because of this rather academic case.

> - if the data is changing (through a writable mapping by someone else
> to the
> page), then you have some sort of producer-/consumer-problem and that
> is
> trivialley solvable with word-sized atomic operations
Really? IMHO, the more bits you can squeeze into your data the better. For instance, look at Tim's tagged_ptr. This assumes 48 bits for address space, where some silicon already supports 52 bits.
I have one case where I'd want to have more than 64 bits without having to revert to CAS.

That said, I have never had the need for 128-bit atomics nor for atomic accesses of read-only pages. But then, when you implement a library you think about these corner cases.

> 
> IMHO the same rationale holds for 64 bit atomics on 32 bit, so
> emulation via
> DCAS is acceptable -- since the lock prefix is needed anyway before
> cmpxchg8b/cmpxchg16b this should also deal with misalignment (even
> though
> this incurs a hefty performance penalty)
>
I don't think you want misaligned data with atomics -- ever. How would you ensure not to cross a cacheline or even a page?

Anyway, I think 64-bit atomics on 32-bit are not too hard -- I think you it already for GCC, VC++ 2010 has all necessary intrinsics. And 128-bit atomics on x86_64 just needs a DCAS loop for most everything.

-hg

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