Re: [boost] [interprocess] (OS X) waiting on condition variable = CPU 100% + fans running loud

Subject: Re: [boost] [interprocess] (OS X) waiting on condition variable = CPU 100% + fans running loud
From: Ion Gaztañaga (igaztanaga_at_[hidden])
Date: 2013-01-08 15:26:21

El 08/01/2013 17:32, Tim Blechmann escribió:
> of course, if the compiler implements std::atomic, there is absolutely
> no need for boost::atomic in the first place ... the whole point is to
> provide a compatibility layer to provide c++11-style atomics for old
> compilers, that don't support c++11 atomics ... which, btw is one of the
> reason why the original author decided to use inline assembly instead of
> compiler intrinsics

I have no experience on assembler coding, but porting assembler code 
from one compiler to another on the same architecture is hard?

Looking at boost/smart_ptr/detail/sp_counted_base_xxx.hpp I see that gcc 
x86 code for atomic_exchange_and_add is:

     // int r = *pw;
     // *pw += dv;
     // return r;

     __asm__ __volatile__
     (
         "lock\n\t"
         "xadd %1, %0":
         "=m"( *pw ), "=r"( r ): // outputs (%0, %1)
         "m"( *pw ), "1"( dv ): // inputs (%2, %3 == %1)
         "memory", "cc" // clobbers
     );

whereas codewarrior code looks like this:

     // int r = *pw;
     // *pw += dv;
     // return r;

     asm
     {
         mov esi, [pw]
         mov eax, dv
         lock xadd dword ptr [esi], eax
     }

Obviously we have "lock" and "xadd" on both cases but we have a lot of 
additional stuff in the gcc case.

If porting between compilers in the same architecture is not very hard, 
Boost.Atomic already supports most widely used architectures (i386, 
x86_64, ppc32, ppc64, armv5, armv6, armv7, alpha), then support for more 
compilers wouldn't be hard to add. On the other hard, if we need to 
write a very different assembler in each compiler, the work will be much 
harder.

Best,

Ion