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Subject: Re: [boost] Any interest in hashing algorithms SHA and/or FNV1a?
From: foster brereton (fosterb+boost_at_[hidden])
Date: 2013-11-13 18:27:42

On Wed, Nov 13, 2013 at 3:03 PM, Christopher Kormanyos
<e_float_at_[hidden]> wrote:
>>> 2) Please, please please make them templates suitable
>>> for use in *all* systems including 8-bit through 64-bit
>>> microcontrollers. Thereby I explicitly mean making the
>>> so called "padding length" (of bits in your case) a template
>>> parameter. Hash algos with any kind of 64-bit use are
>>> can not be sensibly ported to a wide range of micros.
>> I'm not entirely sure how the padding length changes based on the
>> processor upon which the routine is running. The pad length is spec'd
>> to SHA, which I am sure you know, so I must be missing something here.
>> Nevertheless I am willing to work with you to get things right on
>> e.g., 8-bit micros.
> Let me try to add a few details.

[ snip very helpful details]

Yes, I see what you are saying now, thanks for the thorough
explanation of the issue. I'll go back and chew on this idea, as I
like it a lot (and wonder if there are other types that, if made
native to the architecture on which the hash is running, would speed
it up.)

- foster

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