Re: [boost] [Context] RFR: Add support for ARM aarch64 architecture

Subject: Re: [boost] [Context] RFR: Add support for ARM aarch64 architecture
From: Oliver Kowalke (oliver.kowalke_at_[hidden])
Date: 2015-02-25 08:31:22

2015-02-25 12:48 GMT+01:00 Edward Nevill <edward.nevill_at_[hidden]>:

>
> gcc.compile.asm
> ../../../bin.v2/libs/context/build/gcc-4.9.1/debug/address-model-64/architecture-arm/link-static/threading-multi/asm/jump_arm64_aapcs_elf_gas.o
> ../../../libs/context/src/asm/jump_arm64_aapcs_elf_gas.S: Assembler
> messages:
> ../../../libs/context/src/asm/jump_arm64_aapcs_elf_gas.S:86: Error:
> operand 1 should be a floating-point register -- `stp fp,lr,[sp,#0x90]'
> ../../../libs/context/src/asm/jump_arm64_aapcs_elf_gas.S:89: Error:
> operand 1 should be an integer register -- `str lr,[sp,#0xa0]'
> ../../../libs/context/src/asm/jump_arm64_aapcs_elf_gas.S:116: Error:
> operand 1 should be a floating-point register -- `ldp fp,lr,[sp,#0x90]'
>
> The assembler does not recognise the names 'fp', or 'lr'. Instead you must
> use x29, or x30. I thought I had done this already in my original patch.
> Apologies if I made a mistake.
>

I've renamed the code - I assumed that the alias names for register LR and
FP are still valid on 64 bit (too be consistent to the other
implementations)  :^(