Re: [Boost-users] [program_options] seg fault on ppc64 / linux / gcc 3.4.4

From: Peter Dimov (pdimov_at_[hidden])
Date: 2005-08-22 13:17:33

Ben Hutchings wrote:
> Liam Routt wrote:
>
>> In the smart_ptr_test and shared_ptr_test output I note a fair
>> number of use_count() related error messages, which might indeed
>> indicate that the shared_count is a problem area.
>>
>> I have saved the output and can provide it on request, but I didn't
>> think that simply mailing it to the list was necessarily the right
>> step to take. What *is* the right step to take next?
>
> I believe that the shared count is 64-bit on PPC64 (since it is
> declared long) but the atomic operations being used on it assume it's
> 32-bit, since they were written for PPC32.

That's my guess as well.

> If you send the log to me I might
> be able to tell whether this is the case. May I suggest also that you
> try applying the following (wholly untested) patch to
> boost/detail/sp_counted_base_gcc_ppc.hpp and re-running the test:
>
> --- sp_counted_base_gcc_ppc.hpp.orig    2005-08-22 14:31:10.315970200
> +0100 +++ sp_counted_base_gcc_ppc.hpp 2005-08-22 14:30:47.512073200
> +0100 @@ -41,9 +41,9 @@
>     __asm__
>     (
>         "0:\n\t"
> -        "lwarx %1, 0, %2\n\t"
> +        "ldarx %1, 0, %2\n\t"

[...]

I think that it would be better to use a 32 bit count instead, as in the 
patch below (int is 32-bit under both PPC32 and PPC64, right?)

Either way, please let us know whether one or both of these changes resolve 
the issue, so that we can put the fix in 1.33.1, if one is released.

diff -c -r1.3 sp_counted_base_gcc_ppc.hpp
*** sp_counted_base_gcc_ppc.hpp 8 Apr 2005 10:39:28 -0000       1.3
--- sp_counted_base_gcc_ppc.hpp 22 Aug 2005 18:12:00 -0000
***************
*** 32,42 ****
  namespace detail
  {

! inline void atomic_increment( long * pw )
  {
      // ++*pw;

!     long tmp;

      __asm__
      (
--- 32,42 ----
  namespace detail
  {

! inline void atomic_increment( int * pw )
  {
      // ++*pw;

!     int tmp;

      __asm__
      (
***************
*** 52,62 ****
      );
  }

! inline long atomic_decrement( long * pw )
  {
      // return --*pw;

!     long rv;

      __asm__ __volatile__
      (
--- 52,62 ----
      );
  }

! inline int atomic_decrement( int * pw )
  {
      // return --*pw;

!     int rv;

      __asm__ __volatile__
      (
***************
*** 76,87 ****
      return rv;
  }

! inline long atomic_conditional_increment( long * pw )
  {
      // if( *pw != 0 ) ++*pw;
      // return *pw;

!     long rv;

      __asm__
      (
--- 76,87 ----
      return rv;
  }

! inline int atomic_conditional_increment( int * pw )
  {
      // if( *pw != 0 ) ++*pw;
      // return *pw;

!     int rv;

      __asm__
      (
***************
*** 109,116 ****
      sp_counted_base( sp_counted_base const & );
      sp_counted_base & operator= ( sp_counted_base const & );

!     long use_count_;        // #shared
!     long weak_count_;       // #weak + (#shared != 0)

  public:

--- 109,116 ----
      sp_counted_base( sp_counted_base const & );
      sp_counted_base & operator= ( sp_counted_base const & );

!     int use_count_;        // #shared
!     int weak_count_;       // #weak + (#shared != 0)

  public:

***************
*** 170,176 ****

      long use_count() const // nothrow
      {
!         return static_cast<long const volatile &>( use_count_ );
      }
  };

--- 170,176 ----

      long use_count() const // nothrow
      {
!         return static_cast<int const volatile &>( use_count_ );
      }
  };