Re: [Boost-users] Support for sp_counted_base for HP Itanium aCC compiler

From: Baruch Zilber (baruchz_at_[hidden])
Date: 2007-07-26 04:08:17

I saw in HP aCC STD implementation that thay are uses ACQ in increase
and decrease.
If you think REL is better it can be change.

Thanks

-----Original Message-----
From: Peter Dimov [mailto:pdimov_at_[hidden]] 
Sent: Thursday, July 26, 2007 2:29 AM
To: boost-users_at_[hidden]
Subject: Re: [Boost-users] Support for sp_counted_base for
HPItaniumaCCcompiler

Baruch Zilber wrote:
> You are right.
> I fixed it and here is the new implementation:
>
> inline void atomic_increment( int * pw )
> {
>    _Asm_fetchadd(_FASZ_W, _SEM_ACQ, (void*)pw, +1, _LDHINT_NONE);
> }
>
>
> inline int atomic_decrement( int * pw )
> {
>    int r = static_cast<int>(_Asm_fetchadd(_FASZ_W, _SEM_ACQ,
> (void*)pw, -1, _LDHINT_NONE));
>    if (1 == r)
>    {
>        _Asm_mf();
>    }
>
>    return r - 1;
> }

Hmm. Why did you switch to _SEM_ACQ? atomic_increment should use _REL 
because it's rumored to be cheaper, and atomic_decrement needs to use
_REL 
for correctness. 

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