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From: k.hagan_at_[hidden]
Date: 2001-04-25 04:57:24

Peter Schmitteckert said he still hadn't found the interval
library files, so here's a URL.

To address some of the concerns about performance...

 1 Peter gave a URL to some information about the XSC hardware.
   Looking more mainstream, Intel's P4 & IA-64 chips can dispatch
   two FP ops at once. With such support, the basic "FLOP rate"
   need only be 2-4 times less than with plain "double". The major
   performance hit is probably lost optimisation opportunities.
   If compilers understood intervals, they could probably interleave
   the extra computations amongst the rest of the program and
   eliminate the overhead from all but the most FP-intense code.

 2 The use of better algorithms can, as usual, make much more
   difference. The interval version of Newton's algorithm has
   the interesting property of being infallible! It always finds
   all the roots, has linear convergence when far from a root
   and quadratic convergence close to a root. Please compare this
   to a conventional algorithm which misses roots, or bounces into
   never-never land and takes years to crawl back.

 3 Jens' library peforms three "rounding mode switches" per op,
   but if we store [lower,-upper] instead of [lower,upper] then
   we can reduce this to two. That should pretty much double
   the performance of the library on x86 at least. Better, the
   P4 has extra transistors which make it cost-free to alternate
   between just two rounding modes. That should be even better
   news for anyone with this chip. (I don't know if AMD intend
   to follow suit with their next offering.)

Sorry about being processor specific, but I want to show what
*can* be done once a class interface has been established, and
I don't know about other processors in anything like the same

Sun already has substantial support for intervals, as may be seen
(I wonder if they are interested in donating their interface
design to boost?)

A more general home page for the interval community is

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