From: Alexander Terekhov (terekhov_at_[hidden])
Date: 2003-11-17 18:58:04
"Philippe A. Bouchard" wrote:
> Obviously the smart pointer will need to run on SPARC servers for
SPARC-RMO ("vaporware", AFAIK) and also "the" POWER (IBM) do have
naked atomics and "disjoint" (with respect to atomics) load and
store barriers (in various combination)... but, unfortunately, they
are bidirectional load/store "fences" (that's way too heavy; for
efficiency, you really need "hoist-only"/"sink-only" semantics in
most cases), IIUC.
> multithreaded environments. It looked like shared_count_x86_exp2.cpp
> coudn't run on multiple platforms.
Yeah. refcount<> (and compilers with not-rocket-science knowledge
of atomics with "hoist" and "sink" barriers... and that's no matter
how screwed is the hardware -- compilers may reorder "as well") is
the way to go. I guess.
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