Re: [boost] Low-level precision timer proposal - Part II

From: Gennaro Prota (gennaro_prota_at_[hidden])
Date: 2006-07-18 11:02:49

On Tue, 18 Jul 2006 23:54:11 +1000, Martin Slater
<mslater_at_[hidden]> wrote:

>  [I'll see in the]
>> Intel docs if it is possible to detect SpeedStep activation (you won't
>> believe what the processor is actually able to tell you :)) or if
>> other solutions exist.
>
>I hope your successful ;)

Thanks. It's actually not difficult, and fascinating, so I'm well
willing to do it. I just hope there's no drop of interest here, as
that will likely make me move on to something else.

>A good guide to pc timers you may not have 
>seen is here http://www.mindcontrol.org/~hplus/pc-timers.html which has 
>some good ideas for a stable timer on windows x86

Thanks, I'll have a look later. I've to say the Bible is quite good
too (I mean the Intel document :)). Basically the processor does
everything for you, you just need to ask and take some extra care for
cache misses and other issues. The basic idea (sorry for any typos)
is:

__forceinline __int64 cpu_cycle_count()
{
   __int64 prelim;
   __int64 actual;

    // pentium or above required
    asm {
       cpuid
       rdtsc
       lea ebx,prelim
       mov [ebx],eax
       mov [ebx+4],edx

       <repeat the above a
        few times...>

       cpuid
       rdtsc
       lea ebx,actual
       mov [ebx],eax
       mov [ebx+4],edx
   }

   // basic cache miss protection, but
   // something better can be done
   return prelim < actual? prelim : actual;
}

--
[ Gennaro Prota, C++ developer for hire ]
[    resume:  available on request      ]