From: Alexander Terekhov (terekhov_at_[hidden])
Date: 2007-03-23 13:07:55
Peter Dimov wrote:
> aren't clear. Alexander likes to cite the IA64 specs where it is stated that
> ld.acq and st.rel produce the equivalent of the x86 memory model.
Well, IA64 specs say that x86 stuff on Itanic is nothing but TSO. But
the web is full of references to processor consistency/ordering (TSO
sans remote write atomicity) regarding x86 native, not TSO. Intel
representatives won't say anything officially (except referencing
pretty meaningless IA32 spec) at all. So go figure.
Boost list run by bdawes at acm.org, gregod at cs.rpi.edu, cpdaniel at pacbell.net, john at johnmaddock.co.uk