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Subject: Re: [boost] [lockfree] Review
From: Grund, Holger (Holger.Grund_at_[hidden])
Date: 2011-08-08 04:59:47


> > Agreed, this is not impossible, but I still tend to think we should
> strive
> > for a more efficient implementation if at all possible.
>
> Where do you see room for improvement? It is a fallacy to assume that
> "most
> efficient implementation" always means "there is a machine instruction
> providing a 1:1 translation of my high-level construct". Look at this
> from
> the POV of cache synchronisation cost (which is the real cost, not the
> number
> of instructions), and you will realize that there is not much you can
> do
> (assuming you can squeeze the data copies as well as the sequence
> counter
> into the same cacheline).
>
> This approach BTW is already way faster than e.g. using a 64-bit mmx
> register
> and paying the cost of mmx->gpr transfers on x86.
>
That doesn't match my experience. Even in the noncontended case, I would be very surprised to see anything "way faster". On the latest and greatest hardware you may see a small edge for the scheme you propose -- and that's assuming I need a roundtrip to a GPR.

However, under any kind of contention I do expect the MMX MOVQ version to be significantly faster. And of course, 64 bits is less than 32 + 2 * 64.

-hg

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