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Subject: [boost] [atomic] comments
From: Tim Blechmann (tim_at_[hidden])
Date: 2011-10-21 04:27:50

hi helge and others,

... has been rather quiet about the boost.atomic review, so i want to raise a
view issues:

shared memory support:
the fallback implementation relies on the spinlock pool that also used by the
smart pointers. however this pool is per-process, so the fallback
implementation won't work in shared memory. can this be changed/fixed?

is_lock_free is set to either `true' or `false'. however in some cases, there
are alignment constraints (iirc, 64bit atomics on ia32/x86_64 require a 64bit
alignment). afaict there are not precautions to take care of this, are there?

compile-time vs run-time dispatching:
some instructions are not available on every CPU of a specific architecture.
e.g. cmpxchg8b or cmpxchg16b are not available on all ia32/x86_64 cpus. i
would appreciate if these instructions would not be used before performing a
CPUID check, whether these instructions are really available (at least in a
legacy mode)

currently cmpxchg16b doesn't seem to be supported. this instruction is
required for some lock-free data structures (e.g. there is a dequeue
algorithm, that requires a pair of tagged pointers).

maybe this can be a starting point to discuss boost.atomic ...

cheers, tim

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