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Subject: Re: [boost] Going forward with Boost.SIMD
From: Mathias Gaunard (mathias.gaunard_at_[hidden])
Date: 2013-04-24 13:16:24

On 24/04/13 18:31, dag_at_[hidden] wrote:

> Exactly. I urge anyone working on parallelism-related stuff to
> investigate the many vector and parallel architectures that have been
> developed over the decades. The proposed SIMD library is a *very* small
> slice of what's been done and it is a relatively inefficient model at
> that. It was developed in the 1990's when we had much less die area and
> couldn't afford to do "real" vector ISAs in microprocessors. The world
> has changed since then.

The proposed SIMD library supports many architectures and has been
deployed in several pieces of software, from academia to production
software, with complex and varied usage patterns, and has given
significant performance gains where optimizing compilers didn't give
much even when loops were specifically written to be optimizer-friendly.
I wouldn't call it an inefficient model.

It doesn't aim to do all sorts of parallelization, just the SIMD part.
Other parallelization and optimization tasks must be done in addition to
its usage.

> See Intel MIC. This stuff is coming much faster than most people
> realize. From where I sit (developing compilers professionally for
> vector architectures), the path is clear and it is not the current
> SSE/AVX model.

I wouldn't say that MIC is that different from SSE/AVX.
Scatter, predication, conversion on load/store. That's just extras, it
doesn't fundamentally change the model at all.

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