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Subject: Re: [boost] Any interest in hashing algorithms SHA and/or FNV1a?
From: foster brereton (fosterb+boost_at_[hidden])
Date: 2013-11-13 14:56:41

On Wed, Nov 13, 2013 at 11:40 AM, Christopher Kormanyos
<e_float_at_[hidden]> wrote:


> Yes. Absolutely.
> I thought there were some restrictive licensing conditions on the
> algorithms themselves that were incompatible with BPL.
> But others will know this better than I do.
> I have two suggestions, if it ever gets that far.
> 1) Consider making the interface similar to Boost's CRC
> interface, which already exists. I think this does the
> init --- digest --- finish thing, more or less, whereby
> the concept of the final XOR value might be the finish.

An interface is being provided that closely mimics init-digest-finish.
In OpenSSL's implementation of SHA it's init-update-final, and I am
thinking it would be best to conform to other SHA implementations as
close as possible.

> 2) Please, please please make them templates suitable
> for use in *all* systems including 8-bit through 64-bit
> microcontrollers. Thereby I explicitly mean making the
> so called "padding length" (of bits in your case) a template
> parameter. Hash algos with any kind of 64-bit use are
> can not be sensibly ported to a wide range of micros.

I'm not entirely sure how the padding length changes based on the
processor upon which the routine is running. The pad length is spec'd
to SHA, which I am sure you know, so I must be missing something here.
Nevertheless I am willing to work with you to get things right on
e.g., 8-bit micros.


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