Re: [Boost-users] shared_ptr and weak_ptr concurrency

Subject: Re: [Boost-users] shared_ptr and weak_ptr concurrency
From: John Dlugosz (JDlugosz_at_[hidden])
Date: 2009-09-08 11:24:21

> Actually you could.  Atomic CAS instructions support up to 64bits on a
> 32bit platform, and 128bits on a 64bit platform.  As long as those are
> aligned and side-by-side, you can change both atomically.  Although
> Boost does not currently do this.

Right, but the assignment operator doesn't *only* store those two values.  Like I detailed elsewhere, it would need to initialize a temporary, do the double-wide swap of that with the LHS, and then let the temp go out of scope.

The instruction is CMPXCHG8B (or -16B on x64), which as you point out also does a compare.  So code a read followed by the cmp-and-swap.

Checking the CPU manual, I also see that in x64 the operand must be aligned on a 16-byte boundary.  The compiler will only align the structure on the 8-byte boundary (each field is an 8-byte pointer), so you'll also have to convince the compiler to align the structure more strictly.    That doesn't seem to be necessary in x86 mode.

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